Job Description

STA Lead Engineer

Job highlights
B. Tech / M. Tech in ECE with expertise in STA and timing closure in PD domain

Analyze timing constraints and reports, perform STA analysis using PT and Tempus tools
Job match score

Early Applicant

Key Skills

Location

Work Experience

5 – 10 Years

1 Vacancy

Not disclosed

Hyderabad
Must have key skills
sta,physical design,pt,timing closure,pnr
Other key skills
synthesis,cmos,primetime,lvs,timing analysis,floorplan,verilog,asic design,physical verification,routing,floor planning,signal integrity,drc,synopsys,perl,placement,tcl
Job description
What you’ll do
Required skills:

Job Description:

Experience into STA and timing closure/signoff experience with PD domain skill-set/knowledge.

Candidate should be able to understand the timing constraints, analyze design details, analyze timing reports from prepcts to postcts stages, in-depth concepts of 14nm technode STA analysis, DCD knowledge.

Candidate is preferably expert in PT and Tempus tools.

Education Requirements

B. Tech / M. Tech (ECE)

Shift

General

Work Week

Monday to Friday

Joining time

Immediate to 90 Days

Industry type
Electronic Components / Semiconductors
Department
Engineering – Hardware & Networks
Role
Design Verification Engineer
Role category
Hardware
Employment type
Full Time, Permanent
Education
B.Tech/B.E. in Any Specialization, Any Postgraduate

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Design Verification Engineer, Hyderabad

About company
Moschip Technologies Limited
Headquarters
.